This invention relates to an apparatus for detecting the speed of an AC motor such as a synchronous motor or induction motor and, more particularly, to an apparatus which is well-suited for use in detecting the speed of an AC motor when the motor is rotating at a low speed.
A rotating field-type synchronous motor, in which the stator is the armature and the rotor the field pole, operates in such a manner that passing a three-phase alternating current into the stator windings (armature windings) gives rise to a rotating field that "pulls" the field pole into synchronism so that the field pole rotates at the same speed as the magnetic field. One method of controlling such a synchronous motor is to regulate the instantaneous value of the stator (armature) current, whereby a torque can be generated in a manner equivalent to that of a DC motor. A synchronous motor control system of this type will now be described in further detail with reference to FIGS. 1 through 4.
As shown in (a) and (b) of FIG. 1, which illustrates the torque generation mechanism of a shunt DC machine, current is switched by means of a commutator in such a manner that armature current I.sub.a is perpendicular to the principal flux .phi. at all times. The torque produced in such case is given by the following formula: EQU T=k.phi.I.sub.a ( 1)
(where k is a constant), from which it will be seen that the torque T is proportional to the armature current I.sub.a when the principal flux .phi. is constant. In FIG. 1, FM represents the field pole, AM the armature, and AW the armature winding. If the foregoing relation is applied to a rotating field-type synchronous motor as shown in FIG. 2, then correspondence can be established between the flux .phi. and the principal flux vector .phi..sub.s of a field pole PM, and between the armature current I.sub.a and the current vector I.sub.s of an armature winding SW. Thus the torque T generated by the synchronous motor will be: EQU T=k'.phi..sub.s I.sub.s cos .gamma. (2)
(where k' is a constant). Note that .gamma. is the phase difference between armature current I.sub.s and induced voltage E.sub.o, with reference being had to FIG. 3 showing the equivalent circuit of the synchronous motor. In FIG. 3, r.sub.a denotes the resistance of the armature winding SW, and X.sub.s the synchronous reactance which takes into account the armature reaction as well as the armature leakage flux.
If control is so effected that the induced voltage E.sub.o and armature current I.sub.s are made equal in phase, in other words, in such a manner that the principal flux .phi..sub.s and armature current I.sub.s are rendered perpendicular, then the torque T given in Eq. (2) will be expressed by: EQU T=k'.phi..sub.s I.sub.s ( 3)
(where K.sub.T is a conversion constant). Thus the synchronous motor can be driven in a manner equivalent to the generation of torque in a DC motor.
Accordingly, the proposed method of synchronous motor control mentioned above senses the phase of the induced electromotive voltage, generates a current having said phase, and applies the current command to the armature winding of the synchronous motor, thereby driving and controlling the synchronous motor in a manner equivalent to a DC motor. Since the induced voltage E.sub.o and principal flux are displaced in phase by 90.degree., the phase of the induced electromotive voltage can be detected from the principal flux, that is, from the position of the field pole. The proposed system for controlling a synchronous motor is illustrated in the block diagram of FIG. 4.
In FIG. 4, the rotating field-type synchronous motor 101 is indicated at 101. Connected to the shaft of the motor 101 is a pulse generator such as resolver 102 for sensing the position of the field pole. As shown in FIG. 5, the resolver 102 includes a rotor 102a, a rotor winding 102b, two stator windings 102c, 102d displaced in phase from each other by 90.degree., and a carrier wave generating circuit 102e for generating a carrier wave sin wt. If we assume that the rotor 102a occupies a position corresponding to the angle .theta., then the stator windings 102c, 102d will produce voltages given by the following: EQU e.sub.a =sin .theta..multidot.sin wt (4) EQU e.sub.b =cos .theta..multidot.sin wt (5)
Thus the resolver 102 produces a sine wave voltage e.sub.a and a cosine wave voltage e.sub.b, as shown in FIG. 6, both of which conform to the position .theta. of the field pole of synchronous motor 101.
Returning to FIG. 4, the output sine wave and cosine wave voltages e.sub.a, e.sub.b of resolver 102 are applied to a synchronous rectifying circuit 103 which synchronously rectifies these into sine and cosine signals sin .theta., cos .theta., as shown in FIG. 6. A quadrupling circuit 104a also receives the sine and cosine wave voltages e.sub.a, e.sub.b and is adapted to convert them into pulse trains having four times the frequency of the input sine and cosine signals. The qaudrupling circuit 104a, which functions to monitor the phases of the sine and cosine voltage signals e.sub.a, e.sub.b, delivers a forward pulse train P.sub.n of the quadrupled frequency on line l.sub.1 when the motor is rotating in the forward direction, and a reverse pulse train P.sub.r of the quadrupled frequency on line l.sub.2 when the motor is rotating in the reverse direction. The forward and reverse pulse trains P.sub.n, P.sub.r are applied to a frequency-voltage converter (hereafter referred to as an F/V converter) 104b adapted to convert the pulse frequency into a voltage signal TSA, which represents the actual speed of the synchronous motor 101. An arithmetic circuit 105 receives the actual speed voltage signal TSA as well as a speed command voltage VCMD which enters from a speed command circuit, not shown, and is adapted to compute the difference (known as the speed error) ER between TSA and VCMD. The output ER of the arithmetic circuit 105 is applied to an error amplifier 106 for amplifying the speed error ER to produce the amplitude I.sub.s for an armature current. The output I.sub.s of the amplifier 106 is applied to multiplier circuits 107, 108, which receive also the outputs cos .theta., sin .theta., respectively, from the synchronous rectifying circuit 103. Multiplying circuit 107 therefore produces a current command I.sub.1 a (=I.sub.s .multidot. cos .theta.), and multiplying circuit 108 a current command I.sub.1 .multidot.b (=I.sub.s .multidot. sin .theta.). Accordingly, the current commands are of two different phases. The two-phase signals are converted into three-phase signals by a two phase/three phase converting circuit 109 having the construction shown in FIG. 7.
Referring to FIG. 7, the converting circuit 109 includes two operational amplifiers OA.sub.1, OA.sub.2, four 10 Kohm resistors R.sub.1 through R.sub.4, a 5.78 Kohm resistor R.sub.5, and a 5 Kohm resistor R.sub.6. With these values for the resistors R.sub.1 through R.sub.6, and with the circuit arrangement shown in FIG. 7, the converting circuit 109 will produce the following outputs at its terminals T.sub.u, T.sub.v, T.sub.w : ##EQU1## These three signals are three-phase current commands displaced in phase from one another by 2 .pi./3 and of the same phase as the three phases of the induced voltage E.sub.o.
Returning to FIG. 4, arithmetic circuits 110U, 110V, 110W are provided for each of the above phases and serve to compute the different between the commanded currents I.sub.u, I.sub.v, I.sub.w and actual phase currents I.sub.au, I.sub.av, I.sub.aw, respectively. Numeral 111 denotes an arithmetic circuit for adding I.sub.av and I.sub.aw to produce the phase current I.sub.au of the U-phase. Converters 112V, 112W are provided for sensing the phase currents I.sub.av, I.sub.aw of the V- and W-phase. Current amplifiers 113U, 113V, 113W are provided for each of the three phases and function to amplify the current differentials of the respective phases and to generate three phase armature voltage U.sub.u, U.sub.v, U.sub.w. The outputs i.sub.u, i.sub.v, i.sub.w of the current amplifiers are applied to a pulse width modulating circuit 14, whose output side is connected to an inverter 115 to control the same. Designated 116 is a three-phase AC power supply whose three-phase AC output is rectified into direct current by a well-known rectifying circuit 117 having a group of diodes 117a and a capacitor 117b.
To achieve accurate control of a synchronous motor with the foregoing arrangement, it is essential that the rotational speed of the motor be sensed with great accuracy when the motor is rotating at both high and low speeds. Accordingly, in a prior-art speed sensing system, a pulse generator 102 is employed to generate the two-phase signals e.sub.a, e.sub.b, which are displaced in phase by .pi./2 and have a frequency f which is proportional to the rotational speed of the motor, as shown in FIG. 4. Then the two-phase signals are applied to the quadrupling circuit 104a to convert them into signals having a frequency of 4.f. Finally, the F/V converter 104b produces a voltage proportional to the frequency 4.f, namely a voltage (the voltage TSA indicative of actual motor speed) proportional to the motor speed. According to this method, however, the magnitude of the output voltage of the F/V converter drops sharply and is no longer proportional to the motor speed when said speed reaches a low level. Furthermore, rather than subjecting the frequency of the pulses from pulse generator 102 to a frequency-to-voltage conversion, it is better, as far as LSI techniques are concerned, to have a microcomputer read the pulses directly as a digital quantity. Various methods of reading speed is digital fashion have been proposed, one of example of which will be described with reference to FIG. 8.
FIG. 8 illustrates a conventional method in which the pulses from a pulse generator 211 are counted for a predetermined period of time and delivered to a microcomputer 214. The pulse generator 211 generates a pulse PC each time the motor to which it is connected rotates by a predetermined amount. The pulses are counted by a counter 212 whose content is transferred to a register 213 at predetermined intervals, whereupon the counter is reset. The content of the register is then read as the actual motor speed by the microcomputer 214. Thus, by repeating the foregoing operation, actual speed can be extracted in digital fashion. While this method enables speed to be sensed with good accuracy when the motor is rotating at high speed, this is not the case at low motor speeds because the pulses generated by the pulse generator 211 at such time are spaced far apart. In other words, accuracy declines because the pulse period lengthens excessively in the lowspeed region. To improve accuracy, that is, to improve resolution when the motor rotates at a low speed, the number of pulses generated by the pulse generator 211 per revolution must be increased, or the reading cycle must be lengthened. However, since the number of pulses which can be produced by the pulse generator 211 is limited to 10,000 per revolution, a significant increase in resolution cannot be obtained. The alternative approach, namely that of lengthening the reading cycle, only succeeds in degrading control response. To be more specific, the reading cycle (sampling period) for the data in register 213 as read by the microcomputer must be on the order of 1 msec in view of the response of the speed control system. Lengthening the reading cycle would therefore worsen the response. In this connection, let us examine a case where the data in register 213 is sampled at a period of 1 msec, pulse generator 211 produces a pulse train P.sub.c at a rate of 10,000 pulses per revolution, and the motor rotates at a very low speed of 1 rpm. Refer to FIG. 9, in which SP.sub.i denotes the sampling pulses, P.sub.c the pulses produced by the pulse generator 211, and CN the value of the count in counter 212. As described above, the pulses P.sub.c from the pulse generator 211 are counted by counter 212, the data in counter 212 is set in register 213, and the counter is reset, in sync with the sampling pulses SP.sub.i, and the data stored in the register is subsequently read by the microcomputer 214. Since the sampling period is 1 msec and the period of the pulses P.sub.c is 6 msec., the value of the count CN in counter 212 is one when the initial sampling pulse SP.sub.1 is generated, but is zero for the sampling pulses SP.sub.2 through SP.sub.6. In other words, the speed data input to the microcomputer is the intermittent data 1,0,0,0,0. This makes it impossible to achieve accurate control of speed with a quick response. The inventors have therefore proposed (Japnese Patent Application No. 56-74677) a speed detection system which does not rely upon intermittent speed data, thereby enabling speed detection with great accuracy. This previously proposed system will now be described.
In the proposed system, the period T of pulses P.sub.c generated by a pulse generator when a motor is running at low speed is found by counting the pulses, and the motor speed is sensed on the basis of the period T. If we assume that N-number of clock pulses CP are generated in the period of the pulses P.sub.c and that the period of the clock pulses is T (=0.125 .mu.s), then the frequency f of the pulses P.sub.c from the pulse generator may be expressed:
______________________________________ f = 1/T = 1/N .multidot. .DELTA.T (Hz/.mu.sec) = 10.sup.6 /N .multidot. .DELTA.T (Hz/sec) = 60 .times. 10.sup.6 /N .multidot. .DELTA.T ______________________________________ (Hz/min)
Substituting 0.125 for T, we have: EQU f=480.times.10.sup.6 /N (Hz/min) (7)
If the pulse generator produces 10,000 pulses per revolution, then the rotational speed n will be: EQU n=48,000/N (rpm) (8)
In the previously proposed system, therefore, the rotational speed is detected using Eq. (7) or (8) upon finding the period T of the pulses P.sub.c, namely the number N of clock pulses CP generated in one period of the pulses P.sub.c, when the motor is rotating at low speed.
The proposed system is illustrated in the block diagram of FIG. 10. Here, numeral 301 denotes a pulse generator for producing a pair of pulse signals P.sub.c, P.sub.c ' displaced in phase from each other by .pi./2, the pulses in each signal being generated whenever a motor (not shown) rotates by a predetermined amount. A rotational direction discriminating circuit 302 produces a rotational direction signal SGN upon sensing which of the two pulse signals P.sub.c, P.sub.c ' leads in phase. A counter 303 has a clear terminal CLR, a count enable terminal EN, a clock terminal CLK, and a carry pulse generating terminal TC. The pulse signal P.sub.c is applied to the clear terminal CLR, and logical "1" is constantly applied to the count enable terminal EN. The counter 303 consequently is cleared of its data each time a pulse P.sub.c is generated, and thus counts up the clock pulses CP until the generation of the next pulse P.sub.c. A flip-flop 304 is set each time the counter 303 generates a carry pulse OFP, and is reset each time a pulse P.sub.c is generated. Thus, the counter 303 and flip-flop 304 serve to count the clock pulses that are generated in one period of the pulses P.sub.c. It should be noted, however, that the flip-flop 304 can be dispensed with if the counter 303 has a sufficiently large capacity. Numeral 305 denotes an AND gate, and 306 an n-bit register in which the value of the count in counter 303 is set whenever the output of AND gate 305 goes to logical "1", that is, whenever the pulse P.sub.c is generated. Numeral 307 denotes a two-bit register in which the set output of flip-flop 304 and the rotational direction signal SGN ('1" for forward rotation, "0" for reverse rotation) are set each time the output of AND gate 305 goes to logical "1" . A divider 308 receives the data from registers 306, 307 to execute the arithmetic operation of Eq. (8), whereby the rotational speed n is computed. The divider 308 can be realized by relying upon the dividing function of a microcomputer for digitally executing speed control. The divider can be realized quite simply with modern microcomputers that permit 16-bit division in 10 .mu.s or less.
In the operation of the apparatus shown in FIG. 10, counter 303 and flip-flop 304 are reset whenever the pulse generator 301 generates the pulse P.sub.c. Once reset, the counter 303 and flip-flop 304 cooperate to count N-number of clock pulses CP until the arrival of the next pulse P.sub.c, thereby measuring the period of the pulse P.sub.c. When said next pulse P.sub.c is generated, the data stored in counter 303 and in flip-flop 304, as well as the rotational direction signal SGN, are set in registers 306, 307. At the same time, counter 303 and flip-flop 304 are reset again start counting the clock pulses CP. The number N of clock pulses CP stored in the registers 306, 307 is read by the divider 308 which then executes the dividing operation of Eq. (8) to find the rotation speed (rpm) n. Thus, in accordance with the method described in connection with FIG. 10, the detected value is not intermittent, even when the rotational speed or rpm n is very small, as shown in FIG. 11. This enables the speed to be detected much more accurately than in the prior art.
It will be noted from FIG. 11 that the detected speed has a step-like appearance in the previously proposed method. In other words, with the method just described, the actual speed is computed each time the pulse generator issues a pulse, the waveform of the detected speed rises so as to remain equivalent to the actual speed, and the detected value is maintained until the generation of the next pulse. In consequence, though no problem is encountered when the motor speed is constant or when the change in motor speed is gradual, the step width is too large in the case of a comparatively abrupt change in speed, so that an accurate indication of speed cannot be obtained between pulses. This implies the introduction of a delay factor into the speed detection system, meaning that quick-response control cannot be achieved when the gain of the speed control loop is raised.
The foregoing problem is encountered not only in speed control systems for synchronous motors but also in systems for controlling the speed of induction motors.